Inverter-based MUX: A Low Overhead Approach for Logic Encryption
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Abstract
IC overproduction and design theft have been a concern in recent decades for the revenue loss of digital design companies. Logic encryption is a well-known approach to address this problem by locking the functionality of digital designs. In logic encryption techniques, key-gates are added to the design whose functionality is to lock (or obfuscate) the operation of the circuit. Correct functionality is achieved by applying a correct key, which is only known to the IC designer, to these key-gates. The key-gates, however, may incur a considerable overhead to the area and performance of the design. In this paper, a new technique based on simple inverter cells is proposed, which can provide the required locking functionality with low overhead. The results on a set of ISCAS’89 benchmarks reveal that the proposed approach incurs about 2% to 19% area overhead, which is less than any other technique, as well as low power overhead
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