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International Journal of Computer Engineering in Research Trends. Scholarly, Peer-Reviewed,Open Access and Multidisciplinary

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Inverter-based MUX: A Low Overhead Approach for Logic Encryption

Mr. Ghobad Zarrinchian, , , ,
Affiliations
1*Dept. of Computer Engineering, Islamic Azad University of Yadegar-e-Imam Khomeini (rah) Shahr-e-Rey, Tehran, Iran
:10.22362/ijcert/2020/v7/i07/v7i0706


Abstract
IC overproduction and design theft have been a concern in recent decades for the revenue loss of digital design companies. Logic encryption is a well-known approach to address this problem by locking the functionality of digital designs. In logic encryption techniques, key-gates are added to the design whose functionality is to lock (or obfuscate) the operation of the circuit. Correct functionality is achieved by applying a correct key, which is only known to the IC designer, to these key-gates. The key-gates, however, may incur a considerable overhead to the area and performance of the design. In this paper, a new technique based on simple inverter cells is proposed, which can provide the required locking functionality with low overhead. The results on a set of ISCAS’89 benchmarks reveal that the proposed approach incurs about 2% to 19% area overhead, which is less than any other technique, as well as low power overhead.


Citation
Mr. Ghobad Zarrinchian."Inverter-based MUX: A Low Overhead Approach for Logic Encryption". International Journal of Computer Engineering In Research Trends (IJCERT) ,ISSN:2349-7084, Vol.7, Issue 07,pp.30-35, July- 2020, URL:http://ijcert.org/ems/ijcert_papers/V7I706.pdf,


Keywords : Overproduction, design theft, logic encryption, key-gate, obfuscation, inverter

References
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DOI Link : https://doi.org/10.22362/ijcert/2020/v7/i07/v7i0706

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