KONDADASULA VEDA NAGA SAI SRI; M.SAI RAMA KRISHNA. Circuit for Revisable Quantum Multiplier Implementation of Adders with Reversible Logic. International Journal of Computer Engineering in Research Trends, [S. l.], v. 2, n. 12, p. 1216–1221, 2015. Disponível em: https://www.ijcert.org/index.php/ijcert/article/view/415. Acesso em: 14 aug. 2026.